1. Field of the Invention
The present invention relates to a quadrature amplitude modulation (QAM) circuit and more particularly to a QAM circuit which utilizes current signal processing which makes it amenable to being formed as a microwave monolithic integrated circuit (MMIC) or integrated circuit (IC) thus reducing the part count and complexity of the circuit while providing a relatively higher symbol rate than known QAM circuits.
2. Description of the Prior Art
Various modulation techniques are known for modulating a carrier signal with various types of information. Due to limited bandwidth allocations in some applications, modulation techniques have been developed to increase the amount of information that can be transmitted per frequency. One such technique is known as quadrature phase shift keying (QPSK). Such QPSK modulation techniques are known in the art and described in U.S. Pat. Nos.: 5,440,259; 5,615,230; 5,440,268; 5,550,868; 5,598,441; 5,500,876 and 5,485,489; hereby incorporated by reference. In general, in such a modulation technique, the phase of both the real and quadrature components of a carrier are modulated in order to enable two bits, each having two states, to be transmitted over a single frequency. As such, at each frequency, the carrier can be modulated into one of four different phase states, known as symbols, which form a constellation as generally shown in FIG. 1A. The QPSK modulation technique is thus able to provide twice the information per frequency relative to conventional amplitude and frequency modulation techniques such as BPSK, making it suitable for applications where bandwidth allocations are relatively limited as in, for example, satellite communications systems.
In order to further increase the amount of information transmitted per frequency, other modulation techniques have been developed, such as quadrature amplitude modulation (QAM). Such QAM modulation techniques are relatively well known in the art. Examples of such QAM modulation circuits are disclosed in U.S. Pat. Nos.: 5,612,651; 5,343,499; 5,363,408; and 5,307,377; hereby incorporated by reference. Such QAM modulation techniques essentially involve amplitude modulation of a QPSK signal to provide constellations of symbols of 8, 16, 32 and 64 and more per frequency, for example, as illustrated in FIG. 1B.
A known QAM modulation circuit is shown in FIG. 2 and generally identified by the reference numeral 20 and disclosed in, S. Nam, A. E. Ashtiani, I. D. Robertson, S. Lucyszyn, Micorwaves and RF, April 1998, Vol. 37, No. 4, p. 113, hereby incorporated by reference. The QAM circuit 20 includes a digital mapping chip 22, a phase shifter 24, and a variable attenuator 26. The QAM circuit 20 is adapted to generate a constellation of 2N symbols, where N is the number of bits in the data word applied to the digital mapping chip 22. As shown, in FIG. 2, N=6, therefore the QAM circuit 20 is adapted to provide a constellation of 64 symbols. The N bit wide data word is applied to the digital mapping chip, typically an application specific integrated circuit (ASIC), which, in turn, provides signals to the phase shifter 24 and variable attenuator 26 to provide the desired constellation. The output of the QAM circuit 20 is an RF signal at the local oscillator (LO) frequency that during a symbol period, 1/R, where R is the data symbol rate, has an amplitude and phase that corresponds to a specific transmitted word. Demodulators on the receiving end operate by measuring the RF carrier amplitude and phase during a symbol period and performing a reverse mapping operation.
The QAM circuit architecture illustrated in FIG. 2 is relatively simple in nature since it requires very few devices to implement and is known to be low in power consumption. Unfortunately, the symbol transfer rate is known to be limited by the speed of the phase shifter 24 and the variable attenuator 26, currently in the 100 ksps range (100,000 symbols per second), making the system unsuitable for high data rate applications in the millimeter wave bands including the recently allocated 38 GHz band. Another disadvantage of the system illustrated in FIG. 2, is the requirement of a separate digital mapping chip.
FIG. 3 illustrates a QAM circuit which utilizes a commercially available I-Q modulator, along with a digital mapping circuit and a pair of digital to analog converters (DAC) 34 and 36. As discussed in detail by W. H. Pratt in RF Design, 1994, the I-Q modulator 30 provides relatively improved performance and combines the variable attenuator and phase shifter used in the architecture illustrated in FIG. 2 on a single monolithic device. More particularly, the I-Q modulator 30 may utilize Gilbert transconductance cells formed from GaAs or InP heterojunction bipolar transistor (HBT) technology, thus providing relatively higher symbol rates, for example, up to about 100 Msps. Unfortunately, the QAM circuit 28 requires a digital mapping chip 32 and pair of DACs 34 and 36; both of which consume a relatively large amount of power for high symbol rate applications(i.e. 1-3 watts each).
In order to provide an increased symbol rate for use in the higher frequency bands and eliminate the need for the mapping circuit and DACs, a wideband QAM circuit 40 as illustrated in FIG. 4 has been developed. The QAM circuit 40 provides a relatively higher symbol rate, in excess of one giga symbol per second (1 Gsps), utilizing wide bandwidth double-balanced diode mixer in the multiplier sections. As can be seen from FIG. 4, the QAM circuit 40 enables the digital data word (D0, D1, D3, D4 and D5) to be fed directly into the multipliers 42-47, thus eliminating a digital mapping chip. The QAM circuit 40 also eliminates the need for DACs, thus reducing the power consumption of the circuit. Unfortunately, the QAM circuit 40 requires a relatively larger number of discrete components to implement. For example, the 64 QAM modulator illustrated in FIG. 4 requires 10-20 discrete devices, making the modulator 40 relatively complex and expensive to implement. Another disadvantage of the QAM modulator 40 is that it requires extensive tuning to correct for errors produced in the manufacturing processes of the discrete devices as well as circuit interactions.
It is an object of the present invention to solve various problems in the prior art.
It is yet another object of the present invention to provide a quadrature amplitude modulation (QAM) circuit which provides increased symbol rates.
It is yet a further object of the present invention to provide a QAM circuit that is amenable to be formed on a single microwave monolithic integrated circuit (MMIC) or integrated circuit (IC).
It is yet a further object of the present invention to provide a QAM circuit with reduced power consumption.
Briefly, the present invention relates to a 2N-QAM integrated macrocell for generating constellations with 2N symbols, where N is the number of bits in the digital data word [D0:DNxe2x88x921] applied to the integrated macrocell. Since the digital data word is applied directly to the integrated macrocell, the need for a digital mapping chip is eliminated thus reducing the complexity and power consumption of the circuit. An important aspect of the invention is that the 2N-QAM integrated macrocell is amenable to being fabricated as a single microwave monolithic integrated circuit (MMIC) or integrated circuit (IC). As such, a QAM circuit can be formed from one or two MMICs; the 2N-QAM macrocell and a quadrature phase shifting device formed on the same MMIC or a separate MMIC to form a complete 2N-QAM circuit. For lower frequency applications ( less than 1 GHz) the QAM circuit can also be formed on a single IC, using standard silicon BJT processes. The phase shifting device is used to provide the in-phase and quadrature phase components of the local oscillator signal and may be realized using passive or active structures. Since the QAM circuit, in accordance with the present invention, only requires one or two MMIC chips; the complexity and cost of the circuit is reduced and the need for tuning is obviated as a result of the inhernet accuracy and stability of the monolithic process used to fabricate the circuit. The 2N-QAM macrocell may be formed from Gilbert transconductance multipliers with GaAs or InP heterojunction bipolar transistor (HBT) technology, thus providing symbol rates in excess of 1 Gsps. Due to their small size, these structures enable very high levels of functional integration. For applications where the carrier frequency is below 1 GHz, and data rates are below 10 Mbps, conventional Si bipolar processes can be used.